`ordec.lib.base` — Base cell library

class ordec.lib.base.Res(*args, **kwargs)

Ideal resistor

r: Rational: Resistance in ohm

ngspice_current_pins()

symbol

instances_lock = <unlocked _thread.RLock object owner=0 count=0>

class ordec.lib.base.Cap(*args, **kwargs)

Ideal capacitor

c: Rational: Capacitance in farad

ngspice_current_pins()

ic: Rational: Initial condition voltage in volt

symbol

instances_lock = <unlocked _thread.RLock object owner=0 count=0>

class ordec.lib.base.Ind(*args, **kwargs)

Ideal inductor

l: Rational: Inductance in henry

ngspice_current_pins()

symbol

instances_lock = <unlocked _thread.RLock object owner=0 count=0>

class ordec.lib.base.Gnd(*args, **kwargs)

Global ground connection

ngspice_current_pins()

symbol

instances_lock = <unlocked _thread.RLock object owner=0 count=0>

class ordec.lib.base.NoConn(*args, **kwargs)

No connection

symbol

instances_lock = <unlocked _thread.RLock object owner=0 count=0>

class ordec.lib.base.Vdc(*args, **kwargs)

DC voltage source

dc: Rational: DC voltage in volt

ngspice_current_pins()

symbol

instances_lock = <unlocked _thread.RLock object owner=0 count=0>

class ordec.lib.base.Idc(*args, **kwargs)

DC current source

dc: Rational: DC current in ampere

ngspice_current_pins()

symbol

instances_lock = <unlocked _thread.RLock object owner=0 count=0>

class ordec.lib.base.Vpwl(*args, **kwargs)

Piecewise linear voltage source (SPICE PWL).

V: tuple: Tuple of (time, voltage) tuples defining the waveform.

ngspice_current_pins()

symbol: Defines the schematic symbol for the PWL source.

instances_lock = <unlocked _thread.RLock object owner=0 count=0>

class ordec.lib.base.Vpulse(*args, **kwargs)

Pulse voltage source (SPICE PULSE).

ngspice_current_pins()

initial_value: Rational: Voltage before pulse.

pulsed_value: Rational: Voltage during pulse.

delay_time: Rational: Delay before first pulse.

rise_time: Rational: Rise time.

fall_time: Rational: Fall time.

pulse_width: Rational: Pulse width.

period: Rational: Repetition period.

symbol

instances_lock = <unlocked _thread.RLock object owner=0 count=0>

class ordec.lib.base.Vsin(*args, **kwargs)

Sinusoidal voltage source (SPICE SIN). Netlists with both AC and transient specifications.

ngspice_current_pins()

dc: Rational: DC offset.

ac: Rational: Peak amplitude.

freq: Rational: Frequency in Hz.

delay: Rational: Delay before start of sinusoid.

damping: Rational: Exponential damping factor.

symbol

instances_lock = <unlocked _thread.RLock object owner=0 count=0>

class ordec.lib.base.Ipwl(*args, **kwargs)

Piecewise linear current source (SPICE PWL).

ngspice_current_pins()

I: tuple: Tuple of (time, current) tuples defining the waveform.

symbol: Defines the schematic symbol for the PWL current source.

instances_lock = <unlocked _thread.RLock object owner=0 count=0>

class ordec.lib.base.Ipulse(*args, **kwargs)

Pulse current source (SPICE PULSE).

ngspice_current_pins()

initial_value: Rational: Current before pulse.

pulsed_value: Rational: Current during pulse.

delay_time: Rational: Delay before first pulse.

rise_time: Rational: Rise time.

fall_time: Rational: Fall time.

pulse_width: Rational: Pulse width.

period: Rational: Repetition period.

symbol

instances_lock = <unlocked _thread.RLock object owner=0 count=0>

class ordec.lib.base.Isin(*args, **kwargs)

Sinusoidal current source (SPICE SIN).

ngspice_current_pins()

dc: Rational: DC offset.

ac: Rational: Peak amplitude.

freq: Rational: Frequency in Hz.

delay: Rational: Delay before start of sinusoid.

damping: Rational: Exponential damping factor.

symbol

instances_lock = <unlocked _thread.RLock object owner=0 count=0>

ordec.lib.base — Base cell library

`ordec.lib.base` — Base cell library